Chapter 3 - x86 CPU
3.1
x86 Registers
CPU's contain a small set of registers for storing
data. They can contain an instruction, a memory address, or any other type
of data. The x86 CPU's have come in 16-bit, 32-bit, and 64-bit versions
and outlined below. The diagram below shows the 32-bit version of the
x86's registers.
8086 (1978)
The first x86 CPU had 16-bit registers. Four of them (AX, BX, CX,
DX) could be accessed as twice as many 8-bit registers. Since the
address bus had 20 pins, there were extra registers (CS, DS, SS, and ES)
used for storing 20-bit memory addresses.
80386 (1985) - shown in diagram on right
With the 80386, the general purpose 16-bit registers were expanded to
32-bit and added the prefix "e" for extended. The 16-bit registers
were left for backwards compatibility.
AMD Opteron (2003) and Pentium 4 (2004)
The 32-bit registers were expanded to 64-bits and labeled with the
prefix "r" instead of "e".
There are additional registers including the instruction pointer (EIP)
and flags.
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3.2
8086 CPU Pin Assignments
This is the pin assignments (pinout) of the 1978 Intel 8086 CPU.
The address bus is multiplexed (shared) with the data bus so it could fit in a
40-pin dual in-line package.
Data Bus
It has 16-bit registers and can transfer 16-bits at a time on the data
bus (AD0 - AD15).
Address Bus
It has 20-bit memory address bus (AD0 - AD19) so it can address 220
or 1,048,576 bytes of memory. Since the registers are on 16 bits,
it used segment registers CS, DS, SS, ES to store 20 bit addresses.
Interrupt Request
The INTR pin accepts input for triggering an interrupt (such as keyboard
press). The INTA (interrupt acknowledge) pin is activated after a
request.
Status Pins
Pins S0, S1, S2 supply control signals for the bus such as I/O and
memory reads and writes. |
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3.3
x86 History
The table below is a simplified history of Intel x86
CPU's. There were many variation for each model and other manufacturers such as
AMD. The 4004, 8008, and 8080 were predecessors to the first x86 CPU - the
8086. The x86 CPU's are used in Windows PC's and Apple Macintosh computers
beginning in 2006.
The data bus width shows what size of data
the CPU can process. For example, a 32-bit CPU generally will have 32-bit
registers and 32 external pins to transfer data to other computer components
such as memory. The 32-bit CPU's began with the 80386. The 32-bit x86 CPU's
are backwards compatible with 16-bit instructions, and the 64-bit x86 CPU's are
backwards compatible with 32-bit and 16-bit instructions. Due to technological
advances, the number of transistors in CPU's have roughly doubled every two
years which is called
Moore's Law.
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Intel x86
Microprocessors and Predecessors |
|
Year |
Name |
Data Bus Width |
Address Bus Width |
Addressable Memory |
Transistors |
Clock Speed |
Notes |
| 1971 |
4004 |
4 bits |
12 bits |
4 KB |
2,300 |
740 kHz |
Used in calculators |
| 1972 |
8008 |
8 bits |
14 bits |
16 KB |
3,500 |
800 kHz |
Used in Datapoint
microcomputer |
| 1974 |
8080 |
8 bits |
16 bits |
64 KB |
4,500 |
2 MHz |
Used in Altair 8800 |
| 1978 |
8086 |
16 bits |
20 bits |
1 MB |
29,000 |
5 MHz |
First x86 - Used in IBM
PC |
| 1982 |
80286 |
16 bits |
24 bits |
16 MB |
134,000 |
6 MHz |
Used in IBM AT |
| 1985 |
80386 |
32 bits |
32 bits |
4 GB |
275,000 |
16 MHz |
First 32 bit x86 |
| 1989 |
80486 |
32 bits |
32 bits |
4 GB |
1.2 million |
25 MHz |
First integrated cache
and floating-point unit |
| 1993 |
Pentium |
32 bits |
32 bits |
4 GB |
3.1 million |
60 MHz |
|
| 1997 |
Pentium II |
32 bits |
36 bits |
64 GB |
7.5 million |
300 MHz |
|
| 2004 |
Pentium 4 |
64 bits |
36 bits |
64 GB |
42 million |
3 GHz |
First Intel 64 bit x86 |
| 2006 |
Core 2 Duo |
64 bits |
36 bits |
64 GB |
291 million |
2 GHz |
Two cores |
| 2008 |
Core i7 |
64 bits |
36 bits |
64 GB |
731 million |
3 GHz |
Four cores |
| 2017 |
Core i9 |
64 bits |
36 bits |
64 GB |
6.5 billion |
3.3 GHz |
Eight cores |
